Field of the Invention
The invention relates to a solid-state imaging device and a manufacturing method thereof, particularly to a MOS-type solid-state imaging device and a manufacturing method thereof.
Description of the Related Art
Solid-state imaging devices are broadly classified into a charge-transfer type solid-state imaging device represented by a CCD (Charge Coupled Device) image sensor, and an amplifier-type solid state imaging device represented by a MOS-type image sensor, such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor, and the like. In comparing the CCD image sensor with the MOS-type image sensor, the CCD image sensor generally requires a higher drive voltage for transferring signal charges than the MOS-type image sensor does. The CCD image sensor thus has a higher power source voltage than the MOS-type image sensor.
Accordingly, the MOS-type image sensor, which is low in the power source voltage as compared with the CCD image sensor, is more advantageous than the CCD image sensor from the viewpoint of power consumption. The like is preferably used as the solid-state imaging device mounted in mobile devices, such as a portable phone with a camera, or a PDA (Personal Digital Assistant).
In the MOS-type image sensor, as a method of element separation, insulation and separation by a LOCOS (selective oxidation) element separation, an STI (Shallow Trench Isolation) separation, and the like are known (see, for example, Japanese Unexamined Patent Application Publication No. 2002-270808). Also, an EDI separation is known, in which a p-type diffusion layer is implanted into a silicon substrate, and a thick oxide film is deposited thereupon (see K. Itonaga, IEDM Tech. Dig., P33-1, 2005).
FIG. 1 illustrates a MOS-type solid-state imaging device, in particular, the principal part thereof, employing the STI separation for the element separation region. Ina solid-state imaging device 10, for example, a p-type semiconductor well region 2 is formed in an n-type silicon semiconductor substrate 1, a trench 3 is formed in the p-type semiconductor well 2, and a silicon oxide (SiO2) layer 4 is embedded in the trench 3, thereby forming a STI element separation region 5. The silicon oxide layer 4 is formed to protrude above an insulating film (for example, a silicon oxide film) 11 on the surface of the semiconductor substrate 2. An n-type source/drain region 6 of a pixel transistor (for example, an amplification transistor) is formed so as to be separated by the STI element separation region 5, and also a photodiode 7, which will be utilized as a photoelectric conversion unit, is formed. The photodiode 7 is configured as a so-called embedded-type photodiode having an n-type charge accumulation region 8 and a p-type accumulation layer 9 for suppressing dark current on the surface of the charge accumulation region 8. The p-type accumulation layer 9 is formed so as to contact the STI element separation region 5.
FIG. 2 illustrates a MOS-type solid imaging device, in particular, the principal part thereof, adopting the EDI separation for the element separation region. In a solid-state imaging device 13, for example, a p-type semiconductor well region 2 is formed in an n-type silicon semiconductor substrate 1, a p-type diffusion layer 14 is formed in the p-type semiconductor well region 2, and a silicon oxide (SiO2) layer 15, which is wider than the p-type diffusion layer 14 and thicker than an insulating film (for example, a silicon oxide film) 11 on the substrate surface, is formed on the p-type diffusion layer 14, thereby forming an EDI element separation region 16. An n-type source/drain region 6 of a pixel transistor (for example, an amplification transistor) is formed so as to be separated by the EDI element separation region 16, and also a photodiode 7, which will be utilized as a photoelectric conversion unit, is formed. The photodiode 7 is configured as a so-called embedded-type photodiode having an n-type charge accumulation region 8 and a p-type accumulation layer 9 for suppressing dark current on the surface of the charge accumulation region 8. The p-type accumulation layer 9 is formed so as to contact the p-type diffusion layer 14 of the EDI element separation region 16.
On the other hand, in the solid-state imaging device, the number of pixels increases as the resolution is increased, and as the number of pixels increases, each pixel itself is increasingly miniaturized.